Characterisation and Performance of Short-channel Polysilicon Thin-film Transistors

The influence of a range of device parameters on short-channel threshold shifts in n- and p-channel polysilicon TFTs is reported. Reducing the gate dielectric thickness reduces the shifts at low drain bias, but is less effective at high drain bias where channel avalanche multiplication is significant. The polysilicon island thickness has little influence, but passivation of the grain boundaries by hydrogenation does improve the short channel performance.