The challenge of high-performance, deep-submicron design in a turnkey ASIC environment

In this paper, we review the trends and techniques that are shaping high-performance ASIC design in deep-submicron technology. The importance of interconnect in determining performance is breaking the clean division between logical and physical design, while noise analysis is becoming as important as timing analysis in ensuring correct functionality. The growing complexity of rules in precharacterized libraries is making analysis tools that understand transistors more attractive. In addition, new layout techniques allow libraries to be created dynamically, creating the opportunity for truly transistor-level synthesis. Domino logic and pass-transistor circuits promise to find their way into synthesis with increasing performance demands at the high end