Title :
A four-valued logic and switch-level differences
Author_Institution :
Dept. of Comput. Eng., Shanghai Inst. of Railway Technol., China
Abstract :
In this paper, the application of a four-valued logic to the switch-level test generation is studied. A switch-level operator fault model is proposed. Switch-level U difference and Z difference of a function to a fault are defined. A method to derive switch-level differences is given. Finally, a new switch-level test generation algorithm for CMOS circuits is presented
Keywords :
logic testing; many-valued logics; CMOS circuits; four-valued logic; operator fault model; switch-level; switch-level differences; switch-level test generation; test generation; Algebra; CMOS logic circuits; Circuit faults; Circuit testing; Logic circuits; Logic functions; Logic testing; MOSFETs; Switches; Switching circuits;
Conference_Titel :
Multiple-Valued Logic, 1994. Proceedings., Twenty-Fourth International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-8186-5650-6
DOI :
10.1109/ISMVL.1994.302177
