Ion-implanted WN 0.25 /spl mu/m gate MESFET fabricated using i-line photolithography for application to MMIC and digital IC

Author

Eung-Gie Oh ; Jeon-Wook Yang ; Chul-Soon Park ; Kwang-Eui Pyun

Author_Institution

Semicond. Div., Electron. & Telecommun. Res. Inst., Daejeon, South Korea

fYear

1995

fDate

Oct. 29 1995-Nov. 1 1995

Firstpage

93

Lastpage

96

Abstract

Straightforward WN 0.25 /spl mu/m gate MESFET process based on direct ion-implantation and i-line photolithography with double exposure process has produced high performance MESFETs. The maximum transconductance of 600 mS/mm and the k-factor of 450 ms/Vmm were obtained. As high as 65 GHz of cut-off frequency has been realized without any deembedding of parasitic effects. The MESFET shows the minimum noise figure of 0.87 dB and the associated gain of 9.97 dB at 12 GHz.

Keywords

MESFET integrated circuits; MMIC; Schottky gate field effect transistors; digital integrated circuits; ion implantation; photolithography; semiconductor technology; 0.25 micron; 0.87 dB; 12 to 65 GHz; 9.97 dB; MMIC; WN; WN gate MESFET; cut-off frequency; digital IC; double exposure; fabrication; gain; i-line photolithography; ion-implantation; k-factor; noise figure; parasitic effects; transconductance; Application specific integrated circuits; Cutoff frequency; Digital integrated circuits; Gallium arsenide; Lithography; MESFET integrated circuits; MMICs; Noise figure; Resists; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1995. Technical Digest 1995., 17th Annual IEEE

Conference_Location

San Diego, CA, USA

Print_ISBN

0-7803-2966-X

Type

conf

DOI

10.1109/GAAS.1995.528969

Filename

528969