• DocumentCode
    1938670
  • Title

    A multiple-valued logic synthesis using the Kleenean coefficients

  • Author

    Hata, Yutaka ; Yamato, Kazuharu

  • Author_Institution
    Fac. of Eng., Himeji Inst. of Technol., Hyogo, Japan
  • fYear
    1994
  • fDate
    25-27 May 1994
  • Firstpage
    52
  • Lastpage
    57
  • Abstract
    This paper presents a new multiple-valued sum-of-products expression structure and shows its minimization to reduce the number of implicants needed in the minimal sum-of-products expressions. The new expression is introduced as the MAX-of-MIN´s expression of Kleenean coefficients and one or more literals, where Kleenean coefficients are defined as the logic formulas built from MIN, constants and variables xi and x¯i¯. It shows a minimization of the above expressions based on binary Quine McCluskey algorithm. The result of computer simulation shows that a saving of approximately 9% on the average can be had for some random functions. A result for some arithmetic functions shows that the minimal solutions of MOD radix SUM, MAX and MIN functions require much fewer implicants than those of the standard sum-of-products expressions
  • Keywords
    logic design; many-valued logics; Kleenean coefficients; computer simulation; minimization; multiple-valued logic synthesis; sum-of-products expression; Algebra; Arithmetic; Circuit synthesis; Computer simulation; Fuzzy logic; Hardware; Logic design; Logic devices; Logic functions; Minimization methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 1994. Proceedings., Twenty-Fourth International Symposium on
  • Conference_Location
    Boston, MA
  • Print_ISBN
    0-8186-5650-6
  • Type

    conf

  • DOI
    10.1109/ISMVL.1994.302220
  • Filename
    302220