DocumentCode
1938783
Title
Quaternary multiplier circuit
Author
Chu, Wei-Shang ; Current, Wayne
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fYear
1994
fDate
25-27 May 1994
Firstpage
15
Lastpage
18
Abstract
A new quaternary multiplier circuit is presented. This current-mode CMOS circuit multiplies the values of two quaternary-valued input currents and adds a ternary-valued carry input current to generate the two-quaternary-digit output: a most-significant-digit ternary-valued CARRY output current and a quaternary-valued PRODUCT output current. This multiplier circuit uses 49 MOS transistors and generates its outputs in about 10 microseconds, worst case
Keywords
CMOS integrated circuits; emitter-coupled logic; integrated logic circuits; multiplying circuits; ternary logic; current-mode CMOS circuit; quaternary multiplier circuit; quaternary-valued PRODUCT output current; ternary-valued CARRY output current; ternary-valued carry input current; CMOS digital integrated circuits; CMOS logic circuits; CMOS process; Logic circuits; MOS devices; MOSFETs; Mirrors; Threshold current; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 1994. Proceedings., Twenty-Fourth International Symposium on
Conference_Location
Boston, MA
Print_ISBN
0-8186-5650-6
Type
conf
DOI
10.1109/ISMVL.1994.302225
Filename
302225
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