DocumentCode :
1939108
Title :
High Speed BICMOS Technology Emitter-base Self-aligned Structure
Author :
Yamauchi, Tunenori ; Yamada, Shsn-ichi ; Shimauchi, Yoshiki ; Inayoshi, Katsuyuki
Author_Institution :
Bipolar IC Division FUJITSU LIMITED, 1015 Kamikodamaka, Nakahara-ku, Kawasaki 211, Japan
fYear :
1989
fDate :
11-14 Sept. 1989
Firstpage :
155
Lastpage :
158
Abstract :
Recently we have developed a high performance BiCMOS technology, which is a composition of double polysilicon emitter-base self-aligned bipolar and 0.8 ¿m gate CMOS. With this proces, 15 GHz cut-off frequency (f¿) of bipolar transistor and 60 pS of ECL basic delay time (tpd) at Ics = 1 mA have been achieved. For the BiCMOS gate, 220 pS of basic delay time and 325 pS of delay time with 0.5 pF load capacitance have been obtained.
Keywords :
BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; Capacitance; Delay effects; Electrodes; Fabrication; Frequency; Oxidation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location :
Berlin, Germany
Print_ISBN :
0387510001
Type :
conf
Filename :
5436645
Link To Document :
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