DocumentCode
1939989
Title
Pipeline processor for fast architecture oriented regular DCT-IDCT algorithm
Author
Akopian, David ; Astola, Jaakko
Author_Institution
Signal Process. Lab., Tampere Univ. of Technol., Finland
Volume
3
fYear
1996
fDate
7-10 May 1996
Firstpage
1319
Abstract
New architecture oriented regular algorithms are proposed for the discrete cosine transform (DCT), used in DSP problems, with a simple data shuffling pattern similar to the Cooley-Tukey FFT algorithm. One can easily extend many of parallel FFT approaches for these algorithms. The only pipeline structure with logN-1 arithmetic units and transform time of order O(N) is considered. It is simpler than the known pipeline structures
Keywords
digital arithmetic; discrete cosine transforms; inverse problems; parallel algorithms; pipeline arithmetic; signal processing; Cooley-Tukey FFT algorithm; DSP problems; arithmetic units; data shuffling pattern; discrete cosine transform; fast architecture; fast architecture oriented algorithm; parallel FFT; pipeline processor; pipeline structure; pipeline structures; regular DCT-IDCT algorithm; transform time; Arithmetic; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Geometry; Image coding; Laboratories; Pipelines; Signal processing algorithms; Transform coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1996. ICASSP-96. Conference Proceedings., 1996 IEEE International Conference on
Conference_Location
Atlanta, GA
ISSN
1520-6149
Print_ISBN
0-7803-3192-3
Type
conf
DOI
10.1109/ICASSP.1996.543669
Filename
543669
Link To Document