DocumentCode
1940305
Title
A Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures
Author
Chillet, Daniel ; Pillement, Sebastien ; Sentieys, Olivier
Author_Institution
Rennes I Univ., Lannion
fYear
2007
fDate
12-17 Aug. 2007
Firstpage
102
Lastpage
107
Abstract
With increasing embedded application complexity, designers have proposed to introduce new hardware architectures based on heterogeneous processing units on a single chip. For these architectures, the scheduling service of a realtime operating system must be able to assign tasks on different execution resources. This paper presents a model of artificial neural networks used for real-time task scheduling to heterogeneous system-on-chip architectures. Our proposition is an adaptation of the Hopfield model and the main objective concerns the minimization of the neuron number to facilitate future hardware implementation of this service. In fact, to ensure rapid convergence and low complexity, this number must be dramatically reduced. So, we propose new constructing rules to design smaller neural network and we show, through simulations, that network stabilization is obtained without reinitialisation of the network.
Keywords
Hopfield neural nets; real-time systems; scheduling; system-on-chip; Hopfield model; artificial neural networks; hardware architectures; heterogeneous SoC architectures; realtime operating system; realtime task scheduling; system-on-chip; Artificial neural networks; Hardware; Neural networks; Neurons; Operating systems; Processor scheduling; Real time systems; Scheduling algorithm; Signal processing algorithms; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 2007. IJCNN 2007. International Joint Conference on
Conference_Location
Orlando, FL
ISSN
1098-7576
Print_ISBN
978-1-4244-1379-9
Electronic_ISBN
1098-7576
Type
conf
DOI
10.1109/IJCNN.2007.4370938
Filename
4370938
Link To Document