Title :
A high performance BiCMOS 32-bit microprocessor
Author :
Nakatsuka, Yasuhiro ; Hotta, Takashi ; Tanaka, Shigeya ; Bandoh, Tadaaki ; Satomura, Ryuichi ; Nakagami, Syuichi ; Nakano, Tetsuo ; Hotta, Atsuo ; Moriyama, Takashi ; Adachi, Shigemi ; Iwamoto, Shoji
Author_Institution :
Hitachi Ltd., Ibaraki, Japan
Abstract :
The authors have developed the world´s first BiCMOS 32-b single-chip microprocessor. It integrates 529 K transistors into a 12.98-mm2 chip and typically realizes a 70-MHz frequency. The frequency is 1.5-2 times higher than that of current CMOS microprocessors. The microprocessor is designed to reduce the number of interchip communication signals in the critical path and to use basic cells optimally so as to allow fabrication into a single chip. The microprogram is divided into two parts, and frequently used microinstructions are stored in the ROM on the chip to reduce interchip communication. The translation lookaside buffer is also integrated in the microprocessor to reduce the interchip communication signals for memory access. Because of chip size and logic complexity constraints, less than 20% of the basic cells can be BiCMOS cells
Keywords :
BIMOS integrated circuits; VLSI; integrated circuit technology; microprocessor chips; read-only storage; 32 bit; 32-bit microprocessor; 70 MHz; BiCMOS; VLSI; clock 70 MHz; interchip-communications reduction; on chip ROM; single-chip microprocessor; translation lookaside buffer; BiCMOS integrated circuits; Bipolar transistors; CMOS logic circuits; CMOS technology; Capacitance; Delay effects; Frequency; Microprocessors; Read only memory; Signal design;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-1971-6
DOI :
10.1109/ICCD.1989.63387
