DocumentCode :
1941380
Title :
Piezoresistive membrane deflection test structure for the evaluation of hermeticity in low cavity volume MEMS and microelectronic packages
Author :
Costello, S. ; Desmulliez, M.P.Y. ; McCracken, S. ; Lowrie, C. ; Cargill, S. ; Walton, A.J.
Author_Institution :
Microsyst. Eng. Centre (MISEC), Heriot-Watt Univ., Edinburgh, UK
fYear :
2012
fDate :
19-22 March 2012
Firstpage :
45
Lastpage :
49
Abstract :
This paper details the design, fabrication and characterisation of a piezoresistive membrane deflection test structure for the electrical evaluation of hermeticity in low cavity volume package. This test structure uses the 0-level silicon cap, defined in the MultiMEMS foundry service, as a deflecting membrane to electrically monitor changes in package cavity pressure over time. The hermeticity of the package can then be determined in real-time and low leak rates can be measured using a pressurisation stage, which also accelerates the test. The minimum detectable leak rate of the test structure without test acceleration is 6.9×10-12 atm.cm3.s-1, which is two orders of magnitude lower than the limit of the traditional helium fine leak test method.
Keywords :
elemental semiconductors; integrated circuit packaging; micromechanical devices; piezoresistive devices; real-time systems; silicon; 0-level silicon cap; Si; deflecting membrane; helium fine leak test method; hermeticity electrical evaluation; low cavity volume MEMS; low cavity volume package; microelectronic package; multiMEMS foundry service; package cavity pressure; piezoresistive membrane deflection test structure; pressurisation stage; Calibration; Cavity resonators; Conductors; Electrodes; Fabrication; Glass; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures (ICMTS), 2012 IEEE International Conference on
Conference_Location :
San Diego, CA
ISSN :
1071-9032
Print_ISBN :
978-1-4673-1027-7
Type :
conf
DOI :
10.1109/ICMTS.2012.6190611
Filename :
6190611
Link To Document :
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