A 2D Carrier Profiling Technique for VLSI Planar Structures

A novel technique for obtaining two-dimensional free carrier profiles with high spatial resolution has been developed. The technique involves fully automated anodic sectioning of resistor structures on a special VLSI test chip and computer analysis of the data. Application of the technique to determination of the 2D distribution of boron in silicon under an oxide mask edge after implant and anneal is described, and results at a spatial resolution of 600Ax600A and sensitivity of 1017 ions/cc are presented.