• DocumentCode
    1942325
  • Title

    FPGA Implementation of Pulse Density Hopfield Neural Network

  • Author

    Maeda, Yutaka ; Fukuda, Yoshinori

  • Author_Institution
    Kansai Univ., Yamate-cho Suita
  • fYear
    2007
  • fDate
    12-17 Aug. 2007
  • Firstpage
    700
  • Lastpage
    704
  • Abstract
    In this paper, we present a FPGA Hopfield Neural Network system with learning capability using the simultaneous perturbation learning rule. In the neural network, outputs and internal values are represented by pulse train. That is, analog Hopfield Neural Network with pulse frequency representation is considered. The pulse density representation and the simultaneous perturbation enable the system with learning capability to easily implement as a hardware system. Details of the design are described. Some results are also shown to confirm a viability of the system configuration and the learning capability.
  • Keywords
    Hopfield neural nets; field programmable gate arrays; learning (artificial intelligence); perturbation techniques; FPGA implementation; field programmable gate array; perturbation learning rule; pulse density Hopfield neural network; pulse frequency representation; Artificial neural networks; Circuit noise; Circuit synthesis; Field programmable gate arrays; Frequency; Hopfield neural networks; Neural network hardware; Neural networks; Optimization methods; Recurrent neural networks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 2007. IJCNN 2007. International Joint Conference on
  • Conference_Location
    Orlando, FL
  • ISSN
    1098-7576
  • Print_ISBN
    978-1-4244-1379-9
  • Electronic_ISBN
    1098-7576
  • Type

    conf

  • DOI
    10.1109/IJCNN.2007.4371042
  • Filename
    4371042