Counter-based residue arithmetic circuit for easily testable VLSI digital signal processing systems

A counter-based residue arithmetic circuit composed of ring counters which performs residue arithmetic operations by pulse counting is proposed for easily testable VLSI digital signal processing systems. A master-slice LSI on which counter-based residue arithmetic circuits are regularly arranged is also presented. It is demonstrated that the counter-based residue arithmetic circuit has a self-testable structure, and a highly regular and easily testable system implementation can be realized using the circuits