DocumentCode
1943133
Title
CMOS Technology for CCD Video Memories
Author
Davids, G.J.T. ; Hartog, P.B. ; Slotboom, J.W. ; Streutker, G. ; van der Sijde, A.G. ; Wiertsema, W.
Author_Institution
Philips Research Laboratories, PO Box 80.000, NL-5600 JA Eindhoven, The Netherlands
fYear
1988
fDate
13-16 Sept. 1988
Abstract
A new double polysilicon gate technology for an 835 Kbit CCD video memory with a cell of 4×4 ¿m2 [1] is presented. The spacer technology for the LDD MOSFET´s is integrated in the isolation of the double poly CCD structure. This makes the CCD fully compatible with standard CMOS processing and relaxes the anisotropic plasma etching of second poly electrodes. The charge transfer efficiency is high for a SCCD without fat zero (¿ ¿ 2.10¿4). Measurements and calculations on the charge transfer show no degradation for doping concentrations below 8.1015 cm¿3. The leakage current density is measured on the 835 Kbit memory and agrees with earlier measurements on a 308 Kbit CCD video memory [2,6].
Keywords
Anisotropic magnetoresistance; CMOS process; CMOS technology; Charge coupled devices; Charge transfer; Current measurement; Density measurement; Isolation technology; Plasma measurements; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1988. ESSDERC '88. 18th European
Conference_Location
Montpellier, France
Print_ISBN
2868830994
Type
conf
Filename
5436841
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