DocumentCode
1943177
Title
Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning
Author
Tovar, Gessyca Maria ; Fukuda, Eric Shun ; Asai, Tetsuya ; Hirose, Tetsuya ; Amemiya, Yoshihito
Author_Institution
Hokkaido Univ., Sapporo
fYear
2007
fDate
12-17 Aug. 2007
Firstpage
897
Lastpage
901
Abstract
We designed a simple neural segmentation model that is suitable for analog circuit implementation. The model consists of excitable neural oscillators and adaptive synapses, where the learning is governed by a symmetric spike-timing dependent plasticity (STDP). We numerically demonstrate basic operations of the proposed model as well as fundamental circuit operations using a simulation program with integrated circuit emphasis (SPICE).
Keywords
CMOS integrated circuits; SPICE; analogue integrated circuits; neural nets; SPICE; analog circuit implementation; integrated circuit emphasis; neural segmentation model; neuromorphic CMOS circuits; simulation program; symmetric spike-timing dependent plasticity learning; Brain modeling; Coupling circuits; Delay; Integrated circuit modeling; Neural networks; Neuromorphics; Neurons; Oscillators; SPICE; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 2007. IJCNN 2007. International Joint Conference on
Conference_Location
Orlando, FL
ISSN
1098-7576
Print_ISBN
978-1-4244-1379-9
Electronic_ISBN
1098-7576
Type
conf
DOI
10.1109/IJCNN.2007.4371077
Filename
4371077
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