Impact of Thickness and Deposition Temperature of Gate Dielectric on Valence Bands in Silicon Nanowires

The strain distribution and strained valence band structure in silicon nanowire with varied thicknesses and deposition temperatures of gate dielectric are discussed in detail in this work. Our calculation indicates that valence subbands are dependent on the structure and process parameters. Strain has little effects in (001) orientation. But in Si (110) nanowire, the valence subbands shift upper and warp remarkably as the gate dielectric becomes thicker. Taking thermal residual strain into consideration, the strained valence subbands go to higher energy positions compared to NW without the residual strain. The different deposition temperature by a certain process slightly influences the valence bands. Strain effects on densities of states and effective masses are also investigated.