DocumentCode
1943584
Title
A New Isolation Process for VLSI Devices
Author
Figueras, E. ; Coppee, J.-L. ; van de Wiele, F.
Author_Institution
Université Catholique de Louvain, Laboratoire de Microelectronique, Place du Levant, 3, 1348, Louvain-la-Neuve, Belgium
fYear
1987
fDate
14-17 Sept. 1987
Firstpage
473
Lastpage
476
Abstract
In this paper we present a new zero-bird´s beak process which, with an additional photolithographic step, substitutes the thermal fully-recessed field oxide for a CVD oxide. With this process we have fabricated devices which present a very small narrow channel effect. Moreover, the use of a reference mask increases the process reproductivity and reduces the probability of the double-threshold voltage effect. The cross-section and electrical results are presented.
Keywords
Circuit testing; Etching; Isolation technology; Planarization; Resists; Semiconductor films; Silicon; Substrates; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location
Bologna, Italy
Print_ISBN
0444704779
Type
conf
Filename
5436862
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