• DocumentCode
    1944224
  • Title

    Ion Implanted InP MISFET´s with Low Drain Current Drift

  • Author

    Post, G. ; Dimitriou, P. ; Falcou, A. ; Duhamel, N. ; Mermant, G.

  • Author_Institution
    CNET, Laboratoire de Bagneux. 196, Av. Henri Ravera, F-92220 Bagneux, France
  • fYear
    1988
  • fDate
    13-16 Sept. 1988
  • Abstract
    MIS field effect transistors on semi-insulating indium phosphide have been fabricated. The contacts and the channel are doped by silicon implantation. The gate dielectric is SiO2 deposited under UV activation, Depletion-mode devices with a 2-micron channel length have a saturation current drift less than 10 per cent in 24 hours. They are compatible with a laser technology for integrated opto-electronics.
  • Keywords
    Annealing; Etching; FETs; Indium phosphide; Integrated optoelectronics; Irrigation; Plasma applications; Plasma immersion ion implantation; Plasma materials processing; Silicon compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1988. ESSDERC '88. 18th European
  • Conference_Location
    Montpellier, France
  • Print_ISBN
    2868830994
  • Type

    conf

  • Filename
    5436892