Full 3D Simulation of 6T-SRAM Cells for the 22nm Node

Author

Shin, Changwan ; Tsukamoto, Yasumasa ; Sun, Xin ; Liu, Tsu-Jae King

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA

fYear

2009

fDate

9-11 Sept. 2009

Firstpage

1

Lastpage

4

Abstract

6T-SRAM cell designs for the 22 nm node are compared via full 3-dimensional cell simulation with Sentaurus (v.2008.09), to allow the benefits of advanced MOSFET structures to be accurately assessed. Segmented MOSFET (SegFET) technology provides for enhanced read stability and write-ability, as compared to conventional planar and tri-gate technologies. It also provides for improved SRAM cell yield, primarily because of improved robustness to process-induced variations, and improved immunity to soft errors.

Keywords

MOSFET; SRAM chips; field effect memory circuits; semiconductor device models; 6T-SRAM cell design; SRAM cell yield; Sentaurus (v.2008.09); enhanced read stability; enhanced write-ability; full 3D cell simulation; robustness; segmented MOSFET technology; size 22 nm; soft errors; Computational modeling; Computer simulation; Doping profiles; Fabrication; MOSFET circuits; Random access memory; Robustness; Stability; Substrates; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 2009. SISPAD '09. International Conference on

Conference_Location

San Diego, CA

ISSN

1946-1569

Print_ISBN

978-1-4244-3974-8

Electronic_ISBN

1946-1569

Type

conf

DOI

10.1109/SISPAD.2009.5290253

Filename

5290253