Title :
An 80 MFLOPS floating-point engine in the Intel i860 processor
Author :
Sit, Hon P. ; Nofal, Monica Rosenrauch ; Kimn, Sunhyuk
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
The i860 processor is a 64-b microprocessor with 1.02 million transistors. It has a 64-b external data bus and a 32-b external address bus. It is fabricated with Intel´s CHMOS IV technology (a 1-μm double-metal process). The die size is approximately 10 mm×15 mm. First silicon is functional over commercial temperature and voltage ranges with an execution speed of 40 MHz. The floating-point engine consists of a pipelined adder and a pipelined multiplier, incorporates a special hardware to support the dual operation instructions, and operates synchronously with the RISC (reduced-instruction-set computer) core to execute up to three operations per clock. Its high performance lends itself well to a numeric-intensive computation environment, including vector processing
Keywords :
CMOS integrated circuits; digital arithmetic; microprocessor chips; reduced instruction set computing; 1 micron; 10 mm; 15 mm; 32 bit; 40 MHz; 64 bit; 80 MFLOPS; 80 MFLOPS floating-point engine; CHMOS IV technology; CMOS; Intel i860 processor; RISC core; commercial temperature; die size; double-metal process; dual operation instructions; execution speed; floating-point engine; numeric-intensive computation environment; pipelined adder; pipelined multiplier; reduced-instruction-set computer; three operations per clock; vector processing; Clocks; Computer aided instruction; Engines; Hardware; High performance computing; Microprocessors; Reduced instruction set computing; Silicon; Temperature distribution; Voltage;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-1971-6
DOI :
10.1109/ICCD.1989.63391
