DocumentCode
1945430
Title
Manufacturability and reliability of a high-speed CSP SRAM on an interposer package
Author
Liu, Kuo Chuan ; Priest, Judy ; Xue, Jie ; Lin, Jarsh ; Kao, Chin Li ; Wang, Tong Hong ; Lai, Yi Shao
Author_Institution
Cisco Syst., Inc., San Jose, CA
fYear
2008
fDate
27-30 May 2008
Firstpage
374
Lastpage
381
Abstract
Manufacturability and reliability of a custom CSP SRAM mounted on an interposer is discussed in this paper. In order to provide a reliable device for high reliability applications, an SRAM interposer structure was designed to ensure high reliability on every level of solder joint interconnects. Finite element modeling method was used as a mean to evaluate the reliability of various configurations of the protection methods. Test vehicles were built to run reliability tests on selected configurations from FEA simulation to evaluate the integrity and robustness of the SRAM interposer. An under fill process was chosen to be the protection method in production because of its reliability performance. However, extra efforts are needed for implementation during production in order to address the manufacturability concern.
Keywords
SRAM chips; ball grid arrays; finite element analysis; flip-chip devices; semiconductor device reliability; capacity memory package; finite element modeling method; high-performance flip-chip ball grid array; high-speed CSP SRAM; interposer package; solder joint interconnects; Chip scale packaging; Finite element methods; Production; Protection; Pulp manufacturing; Random access memory; Robustness; Soldering; Testing; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2008. ECTC 2008. 58th
Conference_Location
Lake Buena Vista, FL
ISSN
0569-5503
Print_ISBN
978-1-4244-2230-2
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2008.4549999
Filename
4549999
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