• DocumentCode
    1945573
  • Title

    A configurable platform for MPSoCs based on application specific instruction set processors

  • Author

    Ayachi, D. ; Savaria, Y. ; Thibeault, C.

  • Author_Institution
    Dept. de genie Electr., Ecole de Technol. Super., Montreal, QC, Canada
  • fYear
    2009
  • fDate
    June 28 2009-July 1 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, we propose a configurable platform that supports the integration of configurable processors in a multiprocessor system on chip. This platform can be adapted to the application and the design constraints. The configuration of the platform is done through a graphical user interface generated through an XML parameterization file. We also present the platform design flow, including the configuration process. Results show that this platform allows producing, in a few hours, efficient designs that would take weeks to code manually. It opens the door to faster and more thorough exploration of the design space for MPSoCs design.
  • Keywords
    application specific integrated circuits; graphical user interfaces; instruction sets; logic design; multiprocessing systems; system-on-chip; MPSoC design; XML parameterization file; application specific instruction set processors; configurable processors; graphical user interface; multiprocessor system on chip; platform design flow; Application specific processors; Appropriate technology; Automatic control; Design methodology; Graphical user interfaces; Hardware design languages; Logic; Multiprocessing systems; System-on-a-chip; XML;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems and TAISA Conference, 2009. NEWCAS-TAISA '09. Joint IEEE North-East Workshop on
  • Conference_Location
    Toulouse
  • Print_ISBN
    978-1-4244-4573-8
  • Electronic_ISBN
    978-1-4244-4574-5
  • Type

    conf

  • DOI
    10.1109/NEWCAS.2009.5290416
  • Filename
    5290416