• DocumentCode
    1945685
  • Title

    A Benign Hardware Trojan on FPGA-based embedded systems

  • Author

    Zheng, Jason X. ; Chen, Ethan ; Potkonjak, Miodrag

  • Author_Institution
    Dept. of Comput. Sci., Univ. of California, Los Angeles (UCLA), Los Angeles, CA, USA
  • fYear
    2012
  • fDate
    29-31 Aug. 2012
  • Firstpage
    464
  • Lastpage
    470
  • Abstract
    In this paper we present the use of Benign Hardware Trojans (BHT) as a security measure for an embedded system with a software component and a hardware execution environment. Based on delay logic, process variation, and selective transistor aging, the BHT can be incorporated into an embedded system for the software and the hardware components to authenticate each other before functional execution. We will demonstrate an implementation of such a BHT within an embedded system on a Xilinx Spartan-6 FPGA platform. Using the same platform we will also show that the BHT security measurement has a low to modest amount of performance overhead basing on the test results from a variety of synthetic and real world benchmarks.
  • Keywords
    benchmark testing; delay circuits; embedded systems; field programmable gate arrays; logic testing; performance evaluation; BHT security measurement; Benign hardware trojans; FPGA-based embedded systems; Xilinx Spartan-6 FPGA platform; delay logic; functional execution; hardware execution environment; performance overhead; process variation; selective transistor aging; software component; Benchmark testing; Field programmable gate arrays; Ground penetrating radar; Hardware; Registers; Software; Trojan horses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
  • Conference_Location
    Oslo
  • Print_ISBN
    978-1-4673-2257-7
  • Electronic_ISBN
    978-1-4673-2255-3
  • Type

    conf

  • DOI
    10.1109/FPL.2012.6339145
  • Filename
    6339145