• DocumentCode
    1945948
  • Title

    CMOS 65 nm wideband LNA reliability estimation

  • Author

    Ferreira, Pietro Maris ; Petit, Herve ; Naviner, Jean-François

  • Author_Institution
    Telecom ParisTech, Inst. Telecom, Paris, France
  • fYear
    2009
  • fDate
    June 28 2009-July 1 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Radio frequency (RF) products are very demanding in terms of technology developments. Reliability will be one of the most important challenges for the semiconductor industry during the following years. This work presents a wideband low noise amplifier (WBLNA) designed in CMOS 65 nm, its model for reliability estimation, and simulated results of fresh and aged devices. The WBLNA failure, defined in this work as the amount of degradation to have 3 dB gain loss or 10% bandwidth reduction, has been found for HCI ID, SBD and EM degradations. The most important simulated reliability degradation results have been highlighted. Therefore, the design for reliability concept can be systematically applied in the RF front-end circuits, and it has helped with WBLNA reliability improvement.
  • Keywords
    CMOS analogue integrated circuits; low noise amplifiers; semiconductor device reliability; wideband amplifiers; CMOS wideband LNA; loss 3 dB; low noise amplifier; reliability estimation; semiconductor industry; Broadband amplifiers; CMOS technology; Degradation; Electronics industry; Low-noise amplifiers; Radio frequency; Radiofrequency amplifiers; Semiconductor device noise; Semiconductor device reliability; Wideband;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems and TAISA Conference, 2009. NEWCAS-TAISA '09. Joint IEEE North-East Workshop on
  • Conference_Location
    Toulouse
  • Print_ISBN
    978-1-4244-4573-8
  • Electronic_ISBN
    978-1-4244-4574-5
  • Type

    conf

  • DOI
    10.1109/NEWCAS.2009.5290434
  • Filename
    5290434