A region merging approach for image segmentation on FPGA

Author

Trieu, Dang Ba Khac ; Maruyama, Tsutomu

Author_Institution

Syst. & Inf. Eng., Univ. of Tsukuba, Tsukuba, Japan

fYear

2012

fDate

29-31 Aug. 2012

Firstpage

739

Lastpage

742

Abstract

Image segmentation is one of the most important tasks in the image processing, and many algorithms for the segmentation have been proposed. In the segmentation based on the mean-shift, k-means and so on, the image is once over-segmented, and then the small regions are merged. In this paper, we propose a region merging algorithm for hardware systems, in which the data are not managed strictly, and the redundant computation caused by this loose management is hidden by the pipelined and parallel processing. We have implemented the algorithm on Xilinx XC4VLX160, and its performance is about 80 fps for 768 × 512 pixel images.

Keywords

field programmable gate arrays; image segmentation; parallel processing; FPGA; Xilinx XC4VLX160; hardware systems; image processing; image segmentation; k-means algorithm; mean-shift; parallel processing; pipelined processing; pixel images; region merging approach; Field programmable gate arrays; Hardware; Image color analysis; Image segmentation; Indexes; Merging; Real-time systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on

Conference_Location

Oslo

Print_ISBN

978-1-4673-2257-7

Electronic_ISBN

978-1-4673-2255-3

Type

conf

DOI

10.1109/FPL.2012.6339166

Filename

6339166