• DocumentCode
    19463
  • Title

    A Configurable Monitoring Infrastructure for NoC-Based Architectures

  • Author

    Fiorin, Leandro ; Palermo, Gianluca ; Silvano, Cristina

  • Author_Institution
    Adv. Learning & Res. Inst., Univ. of Lugano, Lugano, Switzerland
  • Volume
    22
  • Issue
    11
  • fYear
    2014
  • fDate
    Nov. 2014
  • Firstpage
    2436
  • Lastpage
    2440
  • Abstract
    In this brief, we propose a monitoring architecture for networks-on-chip that provides system information useful for designers to efficiently exploit, at design time and run-time, the system resources available in multiprocessor system-on-chip platforms. We focus on the analysis of the architectural details and design challenges of such a system, by describing powerful tools for monitoring information that can be used both at run-time for detecting dynamic changes in system behavior and at post-execution time for debugging and profiling of applications. This brief describes the design of the monitoring probes, together with the events detectable by them, and discusses an architecture for collecting, storing, and analyzing the information gathered during an application execution.
  • Keywords
    integrated circuit design; monitoring; multiprocessing systems; network-on-chip; NoC-based architectures; configurable monitoring infrastructure; information analysis; information collection; information storage; multiprocessor system-on-chip platform; networks-on-chip; post-execution debugging time; post-execution profiling time; Bandwidth; Detectors; Monitoring; Nickel; Phasor measurement units; Probes; Registers; Hardware counters; networks-on-chip (NoCs); performance monitoring; systems-on-chip (SoCs); systems-on-chip (SoCs).;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2013.2290102
  • Filename
    6680709