DocumentCode
1946707
Title
CAD MOSFET Model for EPROM Cells
Author
Ballay, N. ; Baylac, B.
Author_Institution
SGS-Thomson Microelectronics, Central R&D/CIS/TDMC, BP 217, F-38019 Grenoble Cedex, France
fYear
1988
fDate
13-16 Sept. 1988
Abstract
A CAD model of MOS transistor suitable for circuit simulation of an EPROM cell during writing cycle is proposed. This model is as close as possible of physics to allow the designer to evaluate different schemes and changes in the process variables. It is reliable in the breakdown mode too and takes into account the gate current induced by channel hot electrons.
Keywords
Bipolar transistors; Design automation; EPROM; Electric breakdown; Electric resistance; Electrons; MOSFET circuits; Resistors; Voltage; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1988. ESSDERC '88. 18th European
Conference_Location
Montpellier, France
Print_ISBN
2868830994
Type
conf
Filename
5437013
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