Active terminated differential current-mode receiver for chip-to-chip communication

In this work we propose an active termination scheme at the receiver-end for high-speed current-mode differential signaling. This scheme eliminates the need of any dedicated passive terminator avoiding signal reflection. Elimination of the terminator helps to reduce the transmitted signal level without effecting signal detect-ability of the receiver and also removes the thermal noise of the passive terminator. Reduction of the signal level reduces power consumption in transmitter/receiver(Tx/Rx) circuits. Removal of thermal noise improves the bit-error-rate(BER) of the link. A fully differential current-mode, high speed transmitter/receiver(Tx/Rx) pair suitable for the active termination scheme has been designed. The transmitter is realized by differential current-mode logic(CML) driver. The differential current-mode receiver is realized by cross-coupled common-gate topology. Small signal input impedance of the current-mode receiver matches with characteristic impedance of the backplane. The transmitter and receiver circuits are implemented in 1.8-V, 0.18-mum Digital CMOS technology of f_T 27-GHz. Post layout performance shows that the designed high speed serial-link works up-to 6-Gb/s speed for the targeted bit-error-rate(BER) of 10^-12, while transmitting the data over FR4 PCB trace of length 7.5-inch. The power consumed in the transmitter and receiver circuits is only 9.18-mW at 6-Gb/s data rate.