10+ Gb/s 90nm CMOS serial link demo in CBGA package

Author

Rylov, Sergey ; Reynolds, Scott ; Storaska, Daniel ; Floyd, Brian ; Kapur, Mohit ; Zwick, Thomas ; Gowda, Sudhir ; Sorna, M.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

2004

fDate

3-6 Oct. 2004

Firstpage

27

Lastpage

30

Abstract

We report a 10+ Gb/s serial link demo chip in 90-nm CMOS. It consists of a full-rate 4:1 MUX with 8-tap feed-forward equalizer, a half-rate 1:4 DEMUX with programmable peaking pre-amplifier, and a parallel port interface. The chip is housed in CBGA package and uses ESD devices on all pins. The measured maximum speed of stand-alone transmitter and receiver was 11.7 Gb/s and 13.3 Gb/s respectively, and maximum back-to-back operation speed (transmitter+receiver) was 11.4 Gb/s.

Keywords

CMOS integrated circuits; ball grid arrays; computer interfaces; demultiplexing equipment; electrostatic discharge; equalisers; integrated circuit packaging; multiplexing equipment; preamplifiers; telecommunication links; 11.4 Gbit/s; 11.7 Gbit/s; 13.3 Gbit/s; 90 nm; CBGA package; CMOS serial link; ESD devices; full-rate MUX; half-rate DEMUX; maximum back-to-back operation speed; multiple-tap feed-forward equalizer; parallel port interface; programmable peaking pre-amplifier; stand-alone receiver; stand-alone transmitter; CMOS technology; Clocks; Decision feedback equalizers; Delay; Dynamic range; Feedforward systems; Finite impulse response filter; Multiplexing; Packaging; Transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004

Print_ISBN

0-7803-8495-4

Type

conf

DOI

10.1109/CICC.2004.1358725

Filename

1358725