• DocumentCode
    1947227
  • Title

    FPGA based key generation technique for anti-counterfeiting methods using Physically Unclonable Functions and artificial intelligence

  • Author

    Pappala, Swetha ; Niamat, Mohammed ; Sun, Weiqing

  • Author_Institution
    EECS, Univ. of Toledo, Toledo, OH, USA
  • fYear
    2012
  • fDate
    29-31 Aug. 2012
  • Firstpage
    388
  • Lastpage
    393
  • Abstract
    The threat of digital counterfeiting and forgery of integrated circuits is growing at an alarming rate. At the same time, the functionalities of integrated circuits are becoming much more complex. This paper presents a design for cryptographic applications using Physically Unclonable Functions (PUFs) that can be implemented on an FPGA taking advantage of its unique architecture. The first part of the research involves development of techniques for the generation of uniquely distinguishable responses from ROPUFs taking advantage of the unique architecture of the FPGA and the latter part involves development of error correction technique using Artificial Neural Networks. The proposed design is implemented on several Xilinx Spartan FPGAs and the Hamming distances for the responses are computed and analyzed. The uniqueness of the responses is found to be 49.0625%. It is also found that the results of the proposed ECC also prove to be computationally efficient than the conventional BCH codes.
  • Keywords
    cryptography; electronic engineering computing; field programmable gate arrays; logic design; neural nets; BCH codes; ECC; FPGA based key generation technique; Hamming distances; ROPUF; Xilinx Spartan FPGA; anticounterfeiting methods; artificial intelligence; artificial neural networks; cryptographic applications; integrated circuit digital counterfeiting; integrated circuit forgery; physically unclonable functions; Biological neural networks; Error correction; Error correction codes; Field programmable gate arrays; Multiplexing; Table lookup; Vectors; Bidirectional Associative Memory; Cryptography; Error Correcting Code; Field Programmable Gate Arrays; Neural Network; Physically Unclonable Functions; Security; Supervised Learning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
  • Conference_Location
    Oslo
  • Print_ISBN
    978-1-4673-2257-7
  • Electronic_ISBN
    978-1-4673-2255-3
  • Type

    conf

  • DOI
    10.1109/FPL.2012.6339209
  • Filename
    6339209