DocumentCode
1947264
Title
NOISY: an electrical noise checker for ULSI
Author
Gourdy, F. ; Greiner, A. ; Guillemet, M. ; Marbot, R. ; Murzin, J.
Author_Institution
Bull Syst., Clayes Sous Bois, France
fYear
1988
fDate
7-10 Nov. 1988
Firstpage
226
Lastpage
229
Abstract
NOISY is a part of an electrical rule checker with emphasis on noise computation. NOISY analyzes all types of noise, computes worst-case conditions using a relaxation algorithm, and draws a map of noise distribution in a chip. Its hierarchical organization allows verification of a high-complexity chip (more than 100000 transistors). Developed for CMOS circuitry, both static and dynamic, it can be extended to other types of technology.<>
Keywords
CMOS integrated circuits; VLSI; automatic testing; circuit analysis computing; electron device noise; integrated circuit testing; CMOS circuitry; NOISY; ULSI; chip noise distribution map; chip verification; electrical noise checker; hierarchical organization; noise computation; relaxation algorithm; rule checker; worst-case conditions; CMOS technology; Capacitance; Circuit noise; Crosstalk; Integrated circuit noise; Integrated circuit technology; Pulsed power supplies; Switches; Transfer functions; Ultra large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-0869-2
Type
conf
DOI
10.1109/ICCAD.1988.122499
Filename
122499
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