DocumentCode
1947283
Title
HCM: An abstraction layer for seamless programming of DPR FPGA
Author
Xu, Yan ; Muller, Olivier ; Horrein, Pierre-Henri ; Pétrot, Frédéric
Author_Institution
TIMA Lab., UJF, Grenoble, France
fYear
2012
fDate
29-31 Aug. 2012
Firstpage
583
Lastpage
586
Abstract
Well-known for its efficient computing capabilities, FPGA-based architectures also have the potential for high flexibility with dynamic reconfiguration features. Yet, writing applications on these architectures is laborious, poorly portable and hardly scalable to multi-user and/or multi-FPGA systems, mainly because of a mixture of application related code and flexibility management code. In this paper, we propose a new abstraction layer, called Hardware Component Manager (HCM), which clearly separates the allocation of a hardware function from the control of a reconfiguration procedure, and guarantees the security of coexisting configurations. The implementation of this HCM layer on realistic simulation platforms demonstrates its ability to ease the management of FPGA flexibility while preserving performance and ensuring hardware function protection. HCM implementation and its simulation environment are open-source in the hope of reuse by the community.
Keywords
field programmable gate arrays; programming; DPR FPGA system; HCM; abstraction layer; coexisting configuration security; dynamic reconfiguration features; flexibility management code; hardware component manager; high flexibility; reconfiguration procedure control; seamless programming; simulation environment; Computational modeling; Computer architecture; Field programmable gate arrays; Hardware; Integrated circuit modeling; Resource management; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location
Oslo
Print_ISBN
978-1-4673-2257-7
Electronic_ISBN
978-1-4673-2255-3
Type
conf
DOI
10.1109/FPL.2012.6339212
Filename
6339212
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