Title :
Embedded capacitor-multiplier compensation for area-efficient low-power multistage amplifiers
Author_Institution :
Beijing Microelectron. Technol. Inst., Beijing, China
fDate :
June 28 2009-July 1 2009
Abstract :
An embedded capacitor-multiplier compensation (ECMC) scheme for area-efficient low-power multistage amplifiers is introduced in this paper. Without consuming extra quiescent current, the embedded capacitor multiplier allows the amplifier to drive very large capacitive loads effectively by using quite small on-chip compensation capacitors. Moreover, it provides a feedforward signal path to generate a left-half-plan (LHP) zero and therefore significantly improves the stability and settling behavior of the amplifier. Implemented in a commercial 0.35-mum CMOS process, a three-stage ECMC amplifier driving 1000-pF capacitive load achieves over 100 dB gain, 1.33-MHz unit-gain frequency (UGF), 80deg phase margin and 0.6-V/muS average slew rate, while only dissipating 40-muW under 1.5-V supply. The total compensation capacitance is just 1.45-pF.
Keywords :
CMOS analogue integrated circuits; amplifiers; capacitors; circuit feedback; frequency multipliers; CMOS process; area-efficient low-power multistage amplifiers; capacitance 1.45 pF; capacitance 1000 pF; embedded capacitor-multiplier compensation; extra quiescent current; feedforward signal path; frequency 1.33 MHz; left-half-plan zero; phase margin; power 40 muW; settling behavior; size 0.35 mum; stability; voltage 1.5 V; Bandwidth; Broadband amplifiers; CMOS process; Capacitance; Capacitors; Feedback; Frequency; Stability; Transconductance; Voltage;
Conference_Titel :
Circuits and Systems and TAISA Conference, 2009. NEWCAS-TAISA '09. Joint IEEE North-East Workshop on
Conference_Location :
Toulouse
Print_ISBN :
978-1-4244-4573-8
Electronic_ISBN :
978-1-4244-4574-5
DOI :
10.1109/NEWCAS.2009.5290496
