Title :
Delay-insensitive carry-lookahead adders
Author :
Cheng, Fu-Chiung ; Unger, Stephen H. ; Theobald, Michael ; Cho, Wen-Chung
Author_Institution :
Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
Abstract :
Integer addition is one of the mast important operations in digital computer systems because the performance of processors is significantly influenced by the speed of their adders. This paper proposes a delay insensitive, carry-lookahead adder in which the logic complexity is a linear function of n, the number of inputs, and the average computation time is proportional to the logarithm of the logarithm of n. We also show an economic implementation of this adder in CMOS technology
Keywords :
CMOS logic circuits; adders; asynchronous circuits; carry logic; computational complexity; delays; digital arithmetic; CMOS technology; adder speed; average computation time; delay-insensitive carry-lookahead adders; digital computer systems; economic implementation; integer addition; logic complexity; time complexity; Added delay; Adders; Asynchronous circuits; CMOS logic circuits; CMOS technology; Computer science; Counting circuits; Delay effects; Prototypes; Statistics;
Conference_Titel :
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location :
Hyderabad
Print_ISBN :
0-8186-7755-4
DOI :
10.1109/ICVD.1997.568098
