Title :
QPSK demodulator using the methodology of automated system-level ASIC design
Author :
Kim, Dae-Soon ; Park, Hwak-Dong ; Kang, Chan-Hyoung
Author_Institution :
Daewoo Electron. Co. Ltd., Seoul, South Korea
Abstract :
The design methodology and the basic features of a QPSK digital demodulator fully compliant with the DVB/DSS Recommendations are presented. The ASIC design and development process employs an “automated system-level design scheme” as a new system ASIC design methodology. This paper discusses the nonsynchronized sampling QPSK demodulation algorithm as an illustrative algorithm in order to demonstrate the benefits when developing such an algorithm using a system-level design scheme
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; circuit CAD; demodulators; high level synthesis; integrated circuit design; quadrature phase shift keying; signal sampling; DVB/DSS Recommendations compliance; QPSK demodulator; automated system-level ASIC design; design methodology; digital demodulator; nonsynchronized sampling QPSK demodulation algorithm; Amplitude estimation; Application specific integrated circuits; Demodulation; Digital filters; Frequency estimation; Matched filters; Pulse width modulation; Quadrature phase shift keying; Sampling methods; Timing;
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-4980-6
DOI :
10.1109/ASIC.1998.723017
