Title :
A single chip video coding system with embedded DRAM frame memory for stand-alone applications
Author :
Herrmann, Kai ; Hilgenstock, Jörg ; Pirsch, Peter
Author_Institution :
Lab. fur Informationstechnol., Hannover Univ., Germany
Abstract :
A video coding subsystem for monolithic integration in a 0.25 μm CMOS technology has been developed. It consists of a programmable video signal processor core, up to 8 Mbit frame memory as embedded DRAM and video interfaces. The functionality of all major components has been verified by implementation on test chips in 0.5 μm CMOS technology. A system realization in 0.25 μm CMOS technology is planned. Investigations show that a die size of less than 89 mm2 for a single chip implementation can be achieved
Keywords :
CMOS digital integrated circuits; DRAM chips; digital signal processing chips; video coding; 0.25 micron; 0.5 micron; 8 Mbit; CMOS technology; embedded DRAM frame memory; monolithic integration; programmable video signal processor core; single chip video coding system; stand-alone applications; Application software; Bit rate; CMOS technology; Circuits; Laboratories; Random access memory; Signal processing; Telephony; Testing; Video coding;
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-4980-6
DOI :
10.1109/ASIC.1998.723023
