Title :
Device sizing for minimum energy operation in subthreshold circuits
Author :
Calhoun, Benton H. ; Wang, Alice ; Chandrakasan, Anantha
Author_Institution :
Dept. of Electr. Eng., MIT, Cambridge, MA, USA
Abstract :
Digital circuits operating in the subthreshold region provide the minimum energy solution for applications with strict energy constraints. This paper examines the effect of sizing on energy for subthreshold circuits. We show that minimum sized devices are theoretically optimal for reducing energy. A fabricated 0.18 μm test chip is used to compare normal sizing and sizing for minimum VDD. Measurements show that existing standard cell libraries offer a good solution for minimizing energy in subthreshold circuits.
Keywords :
CMOS logic circuits; integrated circuit design; leakage currents; low-power electronics; 0.18 micron; CMOS logic circuits; device sizing; digital circuits; energy constraints; energy minimization; leakage current; minimum energy operation; standard cell libraries; subthreshold circuits; Capacitance; Circuit testing; Energy consumption; Equations; Inverters; Leakage current; MOS devices; Propagation delay; Semiconductor device measurement; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358745
