DocumentCode :
1947745
Title :
A new self-adapting architecture for feature detection
Author :
Possa, Paulo Da Cunha ; Mahmoudi, Sidi Ahmed ; Harb, Naim ; Valderrama, Carlos
Author_Institution :
Fac. of Eng., Electron. & Microelectron. Dept., Univ. of Mons, Mons, Belgium
fYear :
2012
fDate :
29-31 Aug. 2012
Firstpage :
643
Lastpage :
646
Abstract :
In this paper, we present a FPGA based flexible self-adapting architecture for two features detectors, the Canny edge detector and the Harris corner detector, with reduced latency and memory requirements, and supporting variable resolution images. The new architecture uses neighbourhood extractors that can self-adapt its parameters on-the-fly and algorithm simplifications to reduce mathematical complexity, memory requirements and latency without losing reliability.
Keywords :
edge detection; feature extraction; field programmable gate arrays; Canny edge detector; FPGA based flexible self-adapting architecture; Harris corner detector; algorithm simplifications; feature detection; image resolution; latency requirement; mathematical complexity reduction; memory requirements; Computer architecture; Detectors; Field programmable gate arrays; Graphics processing unit; Image edge detection; Image resolution; Streaming media;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location :
Oslo
Print_ISBN :
978-1-4673-2257-7
Electronic_ISBN :
978-1-4673-2255-3
Type :
conf
DOI :
10.1109/FPL.2012.6339230
Filename :
6339230
Link To Document :
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