• DocumentCode
    1947809
  • Title

    Finite element modeling and experimental validation of conventional and high speed shear testing in Pb-free environment

  • Author

    Ajmera, Abhinav ; Ramkumar, S. Manian ; Liu, Ti Lin

  • Author_Institution
    Center for Electron. Manuf. & Assembly, Rochester Inst. of Technol., Rochester, NY
  • fYear
    2008
  • fDate
    27-30 May 2008
  • Firstpage
    1021
  • Lastpage
    1030
  • Abstract
    With the extensive use of Pb-free solder in electronic assemblies, there is a growing concern about the reliability of the solder joint. The need to identify the capability of high speed shear, to reveal brittle fracture failures, was the driving force behind this study. Shearing of 0603 resistors mounted on a PCB with Pb-free solder was considered as the test process setup for modeling and experimentation. Finite element analysis (FEA) was employed to replicate the process of shearing the solder joint. A comparison was drawn between the FEA results and the results obtained through the actual lab testing. The FEA results for the low speed shear test suggest that the failure would have a very high probability of occurrence in the bulk of the solder with the shear force ranging from 20-28 N. This range, predicted by FEA, was found to be 20% lower than the actual test results. Furthermore, FEA provides reasonable assurance about the capability of high speed shear to demonstrate brittle fracture at the intermetallic. Application of force in the range of 56-65 N would be required for this failure mode at the interface. Moreover, the results establish Finite Element Analysis as a reasonable approach to illustrate the changing stress patterns that a component undergoes when subjected to shear. On the whole, the results of the analysis substantiate high speed (high force) shear being a promising test to predict and detect the brittle fracture failure of the Pb-free interconnects.
  • Keywords
    brittle fracture; electronics packaging; failure (mechanical); finite element analysis; high-speed techniques; interconnections; interface phenomena; materials testing; printed circuit testing; reflow soldering; reliability; solders; stress analysis; tin alloys; PCB; SnJkJk; brittle fracture failures; component-pad interface; electronic assemblies; finite element modeling; high speed shear testing; intermetallic compounds; lead-free interconnects; lead-free solder environment; reflow process; shear force; solder joint reliability; stress patterns; Assembly; Failure analysis; Finite element methods; Intermetallic; Pattern analysis; Resistors; Shearing; Soldering; Stress; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2008. ECTC 2008. 58th
  • Conference_Location
    Lake Buena Vista, FL
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4244-2230-2
  • Electronic_ISBN
    0569-5503
  • Type

    conf

  • DOI
    10.1109/ECTC.2008.4550102
  • Filename
    4550102