Title :
High-performance clocking and digital synthesis - Session 8
Keywords :
Circuit noise; Clocks; Degradation; Digital systems; Frequency; Jitter; Phase locked loops; Phase noise; Phased arrays; Voltage control;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358756
