IP core based architecture of telecommand System-on-Chip (SoC) for spacecraft applications

Consumer demands for high performance and rich functionality have driven the semiconductor manufacturing industry to the integration of multiple complex components onto a single chip. As the complexity of the remotely located physical devices increases, the requirement for a greater telecommanding capability and efficiency arises. This is achieved by embedding pre-designed functions into a single SoC, which utilizes specialized reusable core (IP cores) architecture into complex chip.This paper is concerned with the design of telecommand system for transfer of signals from ground station to space station by the integration of SRAM(Static Random Access Memory), ARM (Advanced RISC Machine) Processor, EDAC unit (Error Detection And Correction). The results are analysed for SPARTAN 3, SPARTAN 6, VIRTEX 4 and VIRTEX 5 FPGA devices. The IP core based architecture using VIRTEX 5 FPGA device makes a trade-off between frequency and time delay with 48% increase in operating frequency and having a minimum time delay of about 5%.