Profiling FPGA floor-planning effects on timing closure

The impact of shape, area allocation and timing constraints on partitions was determined by selecting a standard set of submodules and performing over 1,000,000 place/route experiments. Place/route experiments used different area and timing constraints and their resulting trace reports provided timing results. These results suggest that the best results are obtained when about 20% additional area (above synthesis estimates) is allocated for each submodule. The aspect ratio of submodules is largely a non-issue (there was one exception in the data). In some cases, carefully constraining area dramatically improves results.