DocumentCode
1948737
Title
Integer summing algorithms on reconfigurable meshes
Author
Nakano, Koji ; Wada, Koichi
Author_Institution
Adv. Res. Lab., Hitachi Ltd., Saitama, Japan
Volume
1
fYear
1995
fDate
19-21 Apr 1995
Firstpage
187
Abstract
This paper presents the following algorithms to compute the sum of n d-bit integers on reconfigurable parallel machine models: i) a constant-time algorithm on a reconfigurable mesh of the bit model of size d√n log(O(1)) n×√n, ii) an O(log* n)-time algorithm on a reconfigurable mesh of the bit model of size d√(n/log* n)×√(n/log* n), iii) an O(log d+log* n)-time algorithm on a reconfigurable mesh of the word model of size √(n/(log d+log* n))×√(n/(log d+log* n)), and iv) an O(log* n)-time algorithm on a VLSI reconfigurable circuit of area O(dn/log* n)
Keywords
computational complexity; parallel algorithms; parallel architectures; reconfigurable architectures; VLSI reconfigurable circuit; constant-time algorithm; integer summing algorithms; reconfigurable meshes; reconfigurable parallel machine models; Arithmetic; Broadcasting; Circuits; Computational modeling; Concurrent computing; Parallel algorithms; Parallel machines; Sorting; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Algorithms and Architectures for Parallel Processing, 1995. ICAPP 95. IEEE First ICA/sup 3/PP., IEEE First International Conference on
Conference_Location
Brisbane, Qld.
Print_ISBN
0-7803-2018-2
Type
conf
DOI
10.1109/ICAPP.1995.472185
Filename
472185
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