Author :
Nagano, K. ; Okamoto, K. ; Yamamoto, A. ; Mouri, H. ; Kawabe, A. ; Fujiyama, H. ; Morie, T. ; Nakahira, H. ; Kuramochi, M. ; Ochiai, M. ; Aida, K. ; Ogura, Y. ; Takahashi, T. ; Kakiage, T. ; Takiguchi, M. ; Yamamoto, T. ; Kamiyama, H. ; Katabe, Y.
Abstract :
A 0.13 /spl mu/m CMOS DVD SoC has been developed, reducing the die size from a previous 64 mm/sup 2/ to 34mm/sup 2/ without degrading its performance and functionality, by optimizing the chip architecture and implementation scheme in the same generation process technology. The presented SoC features a novel PRML read channel, employing full digital equalizers with an oversampling method to improve system stability while keeping channel quality.
Keywords :
CMOS integrated circuits; digital versatile discs; equalisers; maximum likelihood detection; mixed analogue-digital integrated circuits; partial response channels; signal sampling; system-on-chip; 0.13 micron; CMOS; DVD player system on a chip; PRML read channel; channel quality; full digital equalizers; mixed signal SoC; oversampling method; partial response maximum likelihood signal processing; system stability; ultra-compact DVD player IC; CMOS technology; Clocks; DVD; Detectors; Digital filters; Equalizers; Finite impulse response filter; Frequency; Phase locked loops; Viterbi algorithm;
