DocumentCode :
1950463
Title :
Limitations to Adaptive Back Bias Approach for Standby Power Reduction in deep sub-micron CMOS
Author :
Montree, A.H. ; van Brandenburg, A.C.M.C. ; Klaassen, D.B.M. ; LLopis, R. Peset ; Ponomarev, Y.V. ; Roes, R.F.M. ; Scholten, A.J. ; van Veen, R.S.
Author_Institution :
Philips Research Laboratories, Eindhoven, The Netherlands
Volume :
1
fYear :
1999
fDate :
13-15 Sept. 1999
Firstpage :
580
Lastpage :
583
Keywords :
Boron; CMOS logic circuits; CMOS technology; Circuit testing; Current measurement; Implants; Leakage current; Logic testing; MOS devices; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 1999. Proceeding of the 29th European
Conference_Location :
Leuven, Belgium
Print_ISBN :
2-86332-245-1
Type :
conf
Filename :
1505569
Link To Document :
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