Title :
iPRIDE: a parallel integrated circuit simulator using direct method
Author :
Mi-Chang Chang ; Hajj, I.N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
Abstract :
A parallel circuit simulator, iPRIDE, which uses a direct solution method and runs on a shared-memory multiprocessor is described. The simulator is based on a multilevel node tearing approach which produces a nested bordered-block-diagonal (BBD) form of the circuit equation matrix. The parallel solution of the nested BBD matrix is described. Its efficiency is shown to depend on how the circuit is partitioned as well as the sequence in which the concurrent tasks (scheduling) are solved. A partitioning heuristic is proposed, assuming that an arbitrary number of processors is available. Scheduling methods are studied when the number of processors is fixed. A method for determining the optimal level of partitioning, which depends on the number of processors as well as the scheduling methods, is described. The program is implemented on an ALLIANT FX/8 multiprocessor with shared memory. The performance of the program is reported.<>
Keywords :
circuit analysis computing; integrated circuits; parallel machines; ALLIANT FX/8 multiprocessor; circuit equation matrix; concurrent tasks; direct solution method; iPRIDE; multilevel node tearing approach; nested BBD matrix; nested bordered-block-diagonal; optimal partitioning level; parallel integrated circuit simulator; parallel solution; partitioning heuristic; scheduling; shared memory; shared-memory multiprocessor; Circuit simulation; Computational modeling; Computer simulation; Differential equations; Integrated circuit interconnections; Integrated circuit modeling; Jacobian matrices; Linear systems; Nonlinear equations; Processor scheduling;
Conference_Titel :
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-0869-2
DOI :
10.1109/ICCAD.1988.122516