Title :
Development of “Stitch” Super-GTOs for pulsed power
Author :
O´Brien, Heather ; Ogunniyi, Aderinto ; Scozzie, Charles J. ; Shaheen, William ; Temple, Victor
Author_Institution :
U.S. Army Res. Lab., Adelphi, MD, USA
Abstract :
Newly designed, high-power silicon gate turn-off thyristors are being evaluated to satisfy the U. S. Army´s need for compact, lightweight pulse switches. Following the successful demonstration of a 3.5 cm2 silicon Super-GTO, Silicon Power Corporation re-designed the emitter layout and increased the device footprint to create a switch optimized for use in high-current, wide-pulse applications. The 7 cm2 silicon “Stitch” Super-GTO was developed to block 7 kV. The 2x increase in die size actually results in a 2.5x increase in active area because a portion of chip area that was previously taken up by perimeter high voltage termination is now used for conduction. The Super-GTOs were evaluated at the Army Research Laboratory in a low-inductance pulse-forming network. Pulse current was successfully stepped up as high as 35 kA, corresponding to a current density of 5 kA/cm2 over the chip´s footprint. This corresponds to 7 kA/cm2 over the active emitter area, when the edge termination is excluded. Compared to Silicon Power´s original device, the new larger component conducted 40% higher current density. The 35 kA current pulse had a width of 125 μs and an I2t of 9.2 ×104 A2s. The 10-90% rise of the current pulse was 2.4 kA/μs, and the maximum on-state forward conduction drop was 28 V. Given good processing and packaging yields, this larger Stitch Super-GTO can greatly reduce the size of high current pulse switches.
Keywords :
current density; elemental semiconductors; inductance; pulsed power switches; silicon; thyristors; Army Research Laboratory; Si; U. S. Army need; active emitter area; current 35 kA; current density; current pulse; die size; edge termination; emitter layout; high current pulse switches; high voltage termination perimeter; high-current wide-pulse applications; high-power silicon gate turn-off thyristors; lightweight pulse switches; low-inductance pulse-forming network; on-state forward conduction drop; pulse current; pulsed power; silicon power corporation redesign; silicon power original device; stitch super-GTOS; voltage 7 kV; Cathodes; Current density; Laboratories; Layout; Logic gates; Silicon; Switches;
Conference_Titel :
Pulsed Power Conference (PPC), 2011 IEEE
Conference_Location :
Chicago, IL
Print_ISBN :
978-1-4577-0629-5
DOI :
10.1109/PPC.2011.6191653