DocumentCode :
1950765
Title :
Finite precision controller implementation - limitation on sample rate
Author :
Cheng, Hung-Ming ; Chiu, George T C
Author_Institution :
Sch. of Mech. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
1
fYear :
2003
fDate :
20-24 July 2003
Firstpage :
634
Abstract :
It is well known that when a discrete-time controller is implemented with finite precision, there is a limit in the achievable sample rate that maybe significantly lower than that limited by the computation resource. In this paper, we investigate this apparent coupling between finite precision implementation and the achievable sample rate. Specifically, we take a deterministic view of the effect of FWL and attempt to develop specific design guidelines for trading-off sample rate and word length selection based on the accuracy of the implementation realizing the desired pole and zero locations of the filter and the desired filter/controller feature.
Keywords :
control system synthesis; discrete time systems; poles and zeros; sampled data systems; discrete-time controller; finite precision controller; pole and zero selections; sample rate; second order digital filter; word length selection; Control systems; Digital filters; Frequency; Laboratories; Mechanical engineering; Mechatronics; Microprocessors; Quantization; Sampling methods; Signal resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Intelligent Mechatronics, 2003. AIM 2003. Proceedings. 2003 IEEE/ASME International Conference on
Print_ISBN :
0-7803-7759-1
Type :
conf
DOI :
10.1109/AIM.2003.1225168
Filename :
1225168
Link To Document :
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