Title :
A 3.5GHz integer-N PLL with dual on-chip loop filters and VCO tune ports for fast low-IF/zero-IF LO switching in an 802.11 transceiver
Author :
Gierkink, Sander L J ; Li, Dandan ; Frye, Robert C. ; Boccuzzi, Vito
Author_Institution :
Agere Syst., Allentown, PA, USA
Abstract :
A PLL-technique is introduced to enable fast switching of an 802.11 transceiver local oscillator (LO) between a low-and a zero intermediate frequency (LIF/ZIF). It uses dual phase/frequency detectors (PFD), charge pumps (CP) and on-chip loop filters to control two separate low-leakage VCO tune ports. Each PFD/tune port combination can be (de)activated separately, without disturbing the loop filter charge. A 50 kHz bandwidth integer-N PLL achieves a measured 7 MHz-jump with ±20 kHz accuracy within 60 μs. The measured phase noise is -123 dBc/Hz at 1 MHz offset.
Keywords :
MMIC oscillators; phase detectors; phase locked loops; phase noise; transceivers; voltage-controlled oscillators; 3.5 GHz; 50 kHz; 60 mus; 802.11 transceiver; LIF; PFD; ZIF; charge pumps; dual on-chip loop filters; fast low-IF/zero-IF LO switching; integer-N PLL; low-leakage VCO tune ports; phase noise; phase/frequency detectors; transceiver local oscillator; Bandwidth; Charge pumps; Filters; Local oscillators; Noise measurement; Phase detection; Phase frequency detector; Phase locked loops; Transceivers; Voltage-controlled oscillators;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358904